University of Information Technology

VHDL Design & Modeling of Digital System

Course Description

After the course, students will be able to explain that the hardware works in parallel and to exploit parallelism in VHDL, explain the function, use, and limitations of reconfigurable versus ASIC technologies, describe a digital design in VHDL, perform simulation and synthesis with modern tools and perform tests against the target technology, create the design specifications of a digital circuit for a given problem apply structured methods for analysis and synthesis of combinational and sequential circuits, use VHDL to implement combinatorial and sequential circuits, use the target FPGA technology to implement a digital hardware design, define FSM encodings and perform state minimization, be able to implement FSMs in VHDL and understand their timing properties, create test benches for VHDL designs, describe and perform the steps required from the VHDL description of a hardware module to its synthesis and hardware implementation. 

The aims of this course are:

  • To provide the desirable balance between teaching the basic concepts and practical application through CAD tools.
  • To facilitate the learning process by using necessary CAD software.
  • To teach students the fundamental concepts in classical manual digital design
  • To illustrate clearly the way in which digital circuits are designed using CAD tools

Intended Learning Outcomes (ILO)

Upon completion of this course, the students could:

  • Manipulate a powerful hardware description language for digital system design.
  • Gain the fundamental knowledge about analysis, synthesis and optimization of combinational and sequential digital circuits.
  • Analyze the basics of a hardware description language.
  • Implement, optimize and evaluate the circuit design for a system
  • Design and implement software applications by integrating the latest innovations, and enhance the capabilities of networks and communications systems.

Text and References Books


  1. Fundamentals of Digital Logic with VHDL Design, Stephen Brown, Zyonko Vranesic, Third Edition, 2009.
  2. Free Range VHDL, Bryan Mealy, Fabrizio Tappero, First Edition, 2012.


  1. Fundamentals of Digital Logic with Verilog Design, Stephen Brown, Zvonko Vranesic, Third Edition, McGraw Hill, 2014.
  2. VHDL: Programming by Example, Douglas L. Perry, Fourth Edition, McGrawHill, 2002.
  3. Digital McLogic Design, Bryan J. Mealy & James T. Mealy, 2012.
  4. Digital Systems Design using VHDL, Charles H. Roth, Jr, 1998.
  5. Circuit Design with VHDL, Volnei A. Pedroni.
  6. VHDL-2008, Peter J. Ashenden, Jim Lewis.

Assessment System

Evaluation Marks Percentage
Tutorial/Discussion 10 Marks 10%
Assignments 10 Marks 10%
Project 20 Marks 20%
Final Examination 60 Marks 60%